ll_cam.c 13 KB

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  1. // Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. //
  7. // http://www.apache.org/licenses/LICENSE-2.0
  8. //
  9. // Unless required by applicable law or agreed to in writing, software
  10. // distributed under the License is distributed on an "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. // See the License for the specific language governing permissions and
  13. // limitations under the License.
  14. #include <stdio.h>
  15. #include <string.h>
  16. #include "soc/system_reg.h"
  17. #include "soc/i2s_struct.h"
  18. #include "hal/gpio_ll.h"
  19. #include "ll_cam.h"
  20. #include "xclk.h"
  21. #include "cam_hal.h"
  22. #if (ESP_IDF_VERSION_MAJOR >= 5)
  23. #define GPIO_PIN_INTR_POSEDGE GPIO_INTR_POSEDGE
  24. #define GPIO_PIN_INTR_NEGEDGE GPIO_INTR_NEGEDGE
  25. #define gpio_matrix_in(a,b,c) gpio_iomux_in(a,b)
  26. #endif
  27. static const char *TAG = "s2 ll_cam";
  28. #define I2S_ISR_ENABLE(i) {I2S0.int_clr.i = 1;I2S0.int_ena.i = 1;}
  29. #define I2S_ISR_DISABLE(i) {I2S0.int_ena.i = 0;I2S0.int_clr.i = 1;}
  30. static void IRAM_ATTR ll_cam_vsync_isr(void *arg)
  31. {
  32. //DBG_PIN_SET(1);
  33. cam_obj_t *cam = (cam_obj_t *)arg;
  34. BaseType_t HPTaskAwoken = pdFALSE;
  35. // filter
  36. ets_delay_us(1);
  37. if (gpio_ll_get_level(&GPIO, cam->vsync_pin) == !cam->vsync_invert) {
  38. ll_cam_send_event(cam, CAM_VSYNC_EVENT, &HPTaskAwoken);
  39. }
  40. if (HPTaskAwoken == pdTRUE) {
  41. portYIELD_FROM_ISR();
  42. }
  43. //DBG_PIN_SET(0);
  44. }
  45. static void IRAM_ATTR ll_cam_dma_isr(void *arg)
  46. {
  47. cam_obj_t *cam = (cam_obj_t *)arg;
  48. BaseType_t HPTaskAwoken = pdFALSE;
  49. typeof(I2S0.int_st) status = I2S0.int_st;
  50. if (status.val == 0) {
  51. return;
  52. }
  53. I2S0.int_clr.val = status.val;
  54. if (status.in_suc_eof) {
  55. ll_cam_send_event(cam, CAM_IN_SUC_EOF_EVENT, &HPTaskAwoken);
  56. }
  57. if (HPTaskAwoken == pdTRUE) {
  58. portYIELD_FROM_ISR();
  59. }
  60. }
  61. bool ll_cam_stop(cam_obj_t *cam)
  62. {
  63. I2S0.conf.rx_start = 0;
  64. if (cam->jpeg_mode || !cam->psram_mode) {
  65. I2S_ISR_DISABLE(in_suc_eof);
  66. }
  67. I2S0.in_link.stop = 1;
  68. return true;
  69. }
  70. esp_err_t ll_cam_deinit(cam_obj_t *cam)
  71. {
  72. gpio_isr_handler_remove(cam->vsync_pin);
  73. if (cam->cam_intr_handle) {
  74. esp_intr_free(cam->cam_intr_handle);
  75. cam->cam_intr_handle = NULL;
  76. }
  77. return ESP_OK;
  78. }
  79. bool ll_cam_start(cam_obj_t *cam, int frame_pos)
  80. {
  81. I2S0.conf.rx_start = 0;
  82. if (cam->jpeg_mode || !cam->psram_mode) {
  83. I2S_ISR_ENABLE(in_suc_eof);
  84. }
  85. I2S0.conf.rx_reset = 1;
  86. I2S0.conf.rx_reset = 0;
  87. I2S0.conf.rx_fifo_reset = 1;
  88. I2S0.conf.rx_fifo_reset = 0;
  89. I2S0.lc_conf.in_rst = 1;
  90. I2S0.lc_conf.in_rst = 0;
  91. I2S0.lc_conf.ahbm_fifo_rst = 1;
  92. I2S0.lc_conf.ahbm_fifo_rst = 0;
  93. I2S0.lc_conf.ahbm_rst = 1;
  94. I2S0.lc_conf.ahbm_rst = 0;
  95. I2S0.rx_eof_num = cam->dma_half_buffer_size; // Ping pong operation
  96. if (!cam->psram_mode) {
  97. I2S0.in_link.addr = ((uint32_t)&cam->dma[0]) & 0xfffff;
  98. } else {
  99. I2S0.in_link.addr = ((uint32_t)&cam->frames[frame_pos].dma[0]) & 0xfffff;
  100. }
  101. I2S0.in_link.start = 1;
  102. I2S0.conf.rx_start = 1;
  103. return true;
  104. }
  105. esp_err_t ll_cam_config(cam_obj_t *cam, const camera_config_t *config)
  106. {
  107. esp_err_t err = camera_enable_out_clock(config);
  108. if(err != ESP_OK) {
  109. return err;
  110. }
  111. periph_module_enable(PERIPH_I2S0_MODULE);
  112. // Configure the clock
  113. I2S0.clkm_conf.clkm_div_num = 2; // 160MHz / 2 = 80MHz
  114. I2S0.clkm_conf.clkm_div_b = 0;
  115. I2S0.clkm_conf.clkm_div_a = 0;
  116. I2S0.clkm_conf.clk_sel = 2;
  117. I2S0.clkm_conf.clk_en = 1;
  118. I2S0.conf.val = 0;
  119. I2S0.fifo_conf.val = 0;
  120. I2S0.fifo_conf.dscr_en = 1;
  121. I2S0.lc_conf.ahbm_fifo_rst = 1;
  122. I2S0.lc_conf.ahbm_fifo_rst = 0;
  123. I2S0.lc_conf.ahbm_rst = 1;
  124. I2S0.lc_conf.ahbm_rst = 0;
  125. I2S0.lc_conf.check_owner = 0;
  126. //I2S0.lc_conf.indscr_burst_en = 1;
  127. //I2S0.lc_conf.ext_mem_bk_size = 0; // DMA access external memory block size. 0: 16 bytes, 1: 32 bytes, 2:64 bytes, 3:reserved
  128. I2S0.timing.val = 0;
  129. I2S0.int_ena.val = 0;
  130. I2S0.int_clr.val = ~0;
  131. I2S0.conf2.lcd_en = 1;
  132. I2S0.conf2.camera_en = 1;
  133. // Configuration data format
  134. I2S0.conf.rx_slave_mod = 1;
  135. I2S0.conf.rx_right_first = 0;
  136. I2S0.conf.rx_msb_right = cam->swap_data;
  137. I2S0.conf.rx_short_sync = 0;
  138. I2S0.conf.rx_mono = 0;
  139. I2S0.conf.rx_msb_shift = 0;
  140. I2S0.conf.rx_dma_equal = 1;
  141. // Configure sampling rate
  142. I2S0.sample_rate_conf.rx_bck_div_num = 1;
  143. I2S0.sample_rate_conf.rx_bits_mod = 8;
  144. I2S0.conf1.rx_pcm_bypass = 1;
  145. I2S0.conf2.i_v_sync_filter_en = 1;
  146. I2S0.conf2.i_v_sync_filter_thres = 4;
  147. I2S0.conf2.cam_sync_fifo_reset = 1;
  148. I2S0.conf2.cam_sync_fifo_reset = 0;
  149. I2S0.conf_chan.rx_chan_mod = 1;
  150. I2S0.fifo_conf.rx_fifo_mod_force_en = 1;
  151. I2S0.fifo_conf.rx_data_num = 32;
  152. I2S0.fifo_conf.rx_fifo_mod = 2;
  153. I2S0.lc_conf.in_rst = 1;
  154. I2S0.lc_conf.in_rst = 0;
  155. I2S0.conf.rx_start = 1;
  156. return ESP_OK;
  157. }
  158. void ll_cam_vsync_intr_enable(cam_obj_t *cam, bool en)
  159. {
  160. if (en) {
  161. gpio_intr_enable(cam->vsync_pin);
  162. } else {
  163. gpio_intr_disable(cam->vsync_pin);
  164. }
  165. }
  166. esp_err_t ll_cam_set_pin(cam_obj_t *cam, const camera_config_t *config)
  167. {
  168. gpio_config_t io_conf = {0};
  169. io_conf.intr_type = cam->vsync_invert ? GPIO_PIN_INTR_NEGEDGE : GPIO_PIN_INTR_POSEDGE;
  170. io_conf.pin_bit_mask = 1ULL << config->pin_vsync;
  171. io_conf.mode = GPIO_MODE_INPUT;
  172. io_conf.pull_up_en = 1;
  173. io_conf.pull_down_en = 0;
  174. gpio_config(&io_conf);
  175. gpio_install_isr_service(ESP_INTR_FLAG_LOWMED | ESP_INTR_FLAG_IRAM);
  176. gpio_isr_handler_add(config->pin_vsync, ll_cam_vsync_isr, cam);
  177. gpio_intr_disable(config->pin_vsync);
  178. PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[config->pin_pclk], PIN_FUNC_GPIO);
  179. gpio_set_direction(config->pin_pclk, GPIO_MODE_INPUT);
  180. gpio_set_pull_mode(config->pin_pclk, GPIO_FLOATING);
  181. gpio_matrix_in(config->pin_pclk, I2S0I_WS_IN_IDX, false);
  182. PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[config->pin_vsync], PIN_FUNC_GPIO);
  183. gpio_set_direction(config->pin_vsync, GPIO_MODE_INPUT);
  184. gpio_set_pull_mode(config->pin_vsync, GPIO_FLOATING);
  185. gpio_matrix_in(config->pin_vsync, I2S0I_V_SYNC_IDX, cam->vsync_invert);
  186. PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[config->pin_href], PIN_FUNC_GPIO);
  187. gpio_set_direction(config->pin_href, GPIO_MODE_INPUT);
  188. gpio_set_pull_mode(config->pin_href, GPIO_FLOATING);
  189. gpio_matrix_in(config->pin_href, I2S0I_H_SYNC_IDX, false);
  190. int data_pins[8] = {
  191. config->pin_d0, config->pin_d1, config->pin_d2, config->pin_d3, config->pin_d4, config->pin_d5, config->pin_d6, config->pin_d7,
  192. };
  193. for (int i = 0; i < 8; i++) {
  194. PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[data_pins[i]], PIN_FUNC_GPIO);
  195. gpio_set_direction(data_pins[i], GPIO_MODE_INPUT);
  196. gpio_set_pull_mode(data_pins[i], GPIO_FLOATING);
  197. // High bit alignment, IN16 is always the highest bit
  198. // fifo accesses data by bit, when rx_bits_mod is 8, the data needs to be aligned by 8 bits
  199. gpio_matrix_in(data_pins[i], I2S0I_DATA_IN0_IDX + 8 + i, false);
  200. }
  201. gpio_matrix_in(0x38, I2S0I_H_ENABLE_IDX, false);
  202. return ESP_OK;
  203. }
  204. esp_err_t ll_cam_init_isr(cam_obj_t *cam)
  205. {
  206. return esp_intr_alloc(ETS_I2S0_INTR_SOURCE, ESP_INTR_FLAG_LOWMED | ESP_INTR_FLAG_IRAM, ll_cam_dma_isr, cam, &cam->cam_intr_handle);
  207. }
  208. void ll_cam_do_vsync(cam_obj_t *cam)
  209. {
  210. ll_cam_vsync_intr_enable(cam, false);
  211. gpio_matrix_in(cam->vsync_pin, I2S0I_V_SYNC_IDX, !cam->vsync_invert);
  212. ets_delay_us(10);
  213. gpio_matrix_in(cam->vsync_pin, I2S0I_V_SYNC_IDX, cam->vsync_invert);
  214. ll_cam_vsync_intr_enable(cam, true);
  215. }
  216. uint8_t ll_cam_get_dma_align(cam_obj_t *cam)
  217. {
  218. return 64;//16 << I2S0.lc_conf.ext_mem_bk_size;
  219. }
  220. static bool ll_cam_calc_rgb_dma(cam_obj_t *cam){
  221. size_t node_max = LCD_CAM_DMA_NODE_BUFFER_MAX_SIZE / cam->dma_bytes_per_item;
  222. size_t line_width = cam->width * cam->in_bytes_per_pixel;
  223. size_t node_size = node_max;
  224. size_t nodes_per_line = 1;
  225. size_t lines_per_node = 1;
  226. // Calculate DMA Node Size so that it's divisable by or divisor of the line width
  227. if(line_width >= node_max){
  228. // One or more nodes will be requied for one line
  229. for(size_t i = node_max; i > 0; i=i-1){
  230. if ((line_width % i) == 0) {
  231. node_size = i;
  232. nodes_per_line = line_width / node_size;
  233. break;
  234. }
  235. }
  236. } else {
  237. // One or more lines can fit into one node
  238. for(size_t i = node_max; i > 0; i=i-1){
  239. if ((i % line_width) == 0) {
  240. node_size = i;
  241. lines_per_node = node_size / line_width;
  242. while((cam->height % lines_per_node) != 0){
  243. lines_per_node = lines_per_node - 1;
  244. node_size = lines_per_node * line_width;
  245. }
  246. break;
  247. }
  248. }
  249. }
  250. ESP_LOGI(TAG, "node_size: %4u, nodes_per_line: %u, lines_per_node: %u",
  251. node_size * cam->dma_bytes_per_item, nodes_per_line, lines_per_node);
  252. cam->dma_node_buffer_size = node_size * cam->dma_bytes_per_item;
  253. if (cam->psram_mode) {
  254. cam->dma_buffer_size = cam->recv_size * cam->dma_bytes_per_item;
  255. cam->dma_half_buffer_cnt = 2;
  256. cam->dma_half_buffer_size = cam->dma_buffer_size / cam->dma_half_buffer_cnt;
  257. } else {
  258. size_t dma_half_buffer_max = CONFIG_CAMERA_DMA_BUFFER_SIZE_MAX / 2 / cam->dma_bytes_per_item;
  259. if (line_width > dma_half_buffer_max) {
  260. ESP_LOGE(TAG, "Resolution too high");
  261. return 0;
  262. }
  263. // Calculate minimum EOF size = max(mode_size, line_size)
  264. size_t dma_half_buffer_min = node_size * nodes_per_line;
  265. // Calculate max EOF size divisable by node size
  266. size_t dma_half_buffer = (dma_half_buffer_max / dma_half_buffer_min) * dma_half_buffer_min;
  267. // Adjust EOF size so that height will be divisable by the number of lines in each EOF
  268. size_t lines_per_half_buffer = dma_half_buffer / line_width;
  269. while((cam->height % lines_per_half_buffer) != 0){
  270. dma_half_buffer = dma_half_buffer - dma_half_buffer_min;
  271. lines_per_half_buffer = dma_half_buffer / line_width;
  272. }
  273. // Calculate DMA size
  274. size_t dma_buffer_max = 2 * dma_half_buffer_max;
  275. size_t dma_buffer_size = dma_buffer_max;
  276. dma_buffer_size =(dma_buffer_max / dma_half_buffer) * dma_half_buffer;
  277. ESP_LOGI(TAG, "dma_half_buffer_min: %5u, dma_half_buffer: %5u, lines_per_half_buffer: %2u, dma_buffer_size: %5u",
  278. dma_half_buffer_min * cam->dma_bytes_per_item, dma_half_buffer * cam->dma_bytes_per_item, lines_per_half_buffer, dma_buffer_size * cam->dma_bytes_per_item);
  279. cam->dma_buffer_size = dma_buffer_size * cam->dma_bytes_per_item;
  280. cam->dma_half_buffer_size = dma_half_buffer * cam->dma_bytes_per_item;
  281. cam->dma_half_buffer_cnt = cam->dma_buffer_size / cam->dma_half_buffer_size;
  282. }
  283. return 1;
  284. }
  285. bool ll_cam_dma_sizes(cam_obj_t *cam)
  286. {
  287. cam->dma_bytes_per_item = 1;
  288. if (cam->jpeg_mode) {
  289. if (cam->psram_mode) {
  290. cam->dma_buffer_size = cam->recv_size;
  291. cam->dma_half_buffer_size = 1024;
  292. cam->dma_half_buffer_cnt = cam->dma_buffer_size / cam->dma_half_buffer_size;
  293. cam->dma_node_buffer_size = cam->dma_half_buffer_size;
  294. } else {
  295. cam->dma_half_buffer_cnt = 16;
  296. cam->dma_buffer_size = cam->dma_half_buffer_cnt * 1024;
  297. cam->dma_half_buffer_size = cam->dma_buffer_size / cam->dma_half_buffer_cnt;
  298. cam->dma_node_buffer_size = cam->dma_half_buffer_size;
  299. }
  300. } else {
  301. return ll_cam_calc_rgb_dma(cam);
  302. }
  303. return 1;
  304. }
  305. size_t IRAM_ATTR ll_cam_memcpy(cam_obj_t *cam, uint8_t *out, const uint8_t *in, size_t len)
  306. {
  307. // YUV to Grayscale
  308. if (cam->in_bytes_per_pixel == 2 && cam->fb_bytes_per_pixel == 1) {
  309. size_t end = len / 8;
  310. for (size_t i = 0; i < end; ++i) {
  311. out[0] = in[0];
  312. out[1] = in[2];
  313. out[2] = in[4];
  314. out[3] = in[6];
  315. out += 4;
  316. in += 8;
  317. }
  318. return len / 2;
  319. }
  320. // just memcpy
  321. memcpy(out, in, len);
  322. return len;
  323. }
  324. esp_err_t ll_cam_set_sample_mode(cam_obj_t *cam, pixformat_t pix_format, uint32_t xclk_freq_hz, uint16_t sensor_pid)
  325. {
  326. if (pix_format == PIXFORMAT_GRAYSCALE) {
  327. if (sensor_pid == OV3660_PID || sensor_pid == OV5640_PID || sensor_pid == NT99141_PID) {
  328. cam->in_bytes_per_pixel = 1; // camera sends Y8
  329. } else {
  330. cam->in_bytes_per_pixel = 2; // camera sends YU/YV
  331. }
  332. cam->fb_bytes_per_pixel = 1; // frame buffer stores Y8
  333. } else if (pix_format == PIXFORMAT_YUV422 || pix_format == PIXFORMAT_RGB565) {
  334. cam->in_bytes_per_pixel = 2; // camera sends YU/YV
  335. cam->fb_bytes_per_pixel = 2; // frame buffer stores YU/YV/RGB565
  336. } else if (pix_format == PIXFORMAT_JPEG) {
  337. cam->in_bytes_per_pixel = 1;
  338. cam->fb_bytes_per_pixel = 1;
  339. } else {
  340. ESP_LOGE(TAG, "Requested format is not supported");
  341. return ESP_ERR_NOT_SUPPORTED;
  342. }
  343. return ESP_OK;
  344. }